SystemC Primer


This 3-day training introduces the student to the SystemC C++ class library and the TLM 2.0 modeling standard. It is intended for engineers who are new to SystemC or those with an interest in learning SystemC for modeling purposes. The student will learn how to write, compile, execute, and debug system and hardware descriptions with SystemC, and will receive thorough and in-depth coverage of the concepts of the Accellera/IEEE TLM 2.0 modeling standard. This course is mixed lecture and exercises, with an exercise for nearly every topic.


Introduction to SystemC

• Core library basics

o Modules & communication (channels, ports, and exports)

o Simulation kernel: scheduler, events, and event queues

• Modeling behavior

o Method processes

o Dynamic and static thread processes

o Hierarchy creation and Simulation Initialization

• Core library elements

o SystemC data types

o Debugging and tracing aids

o Primitive channels

• User defined channels

o Custom constructors

Introduction to the IEEE TLM 2.0 Standard

• TLM 2.0 Overview

o Interfaces, sockets, generic payload, and protocol

• Generic payload overview

• Interfaces

o Transport (blocking interface and non-blocking)


o Debug

• Sockets

o Initiator and Target

o Socket Binding

o Hierarchy, Multi-connect

• Convenience Sockets

o Simple Sockets

o Tagged Sockets

o Multi-passthrough Sockets

• Generic Payload In-depth

o Byte Enable, Streaming, and endianness

o Memory Management

o Generic Payload Extensions (and exercise)


Basic knowledge of C/C++


Engineers who are new to systemC or those with an interest in learning SystemC for modeling purposes

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